Pulse light-receiving circuit with means to minimize power source noise

ABSTRACT

A pulse light-receiving circuit includes a pair of preamplifiers made up of the same circuit components, a difference amplifier for amplifying the outputs from the preamplifiers, and a pair of peak value-detecting circuits made up of the same circuit component for obtaining the amplitude of an input pulse signal. The median of that amplitude is used as a reference voltage for comparison with an output from the difference amplifier.

BACKGROUND OF THE INVENTION

(1) Field of the Invention

The present invention relates to a pulse light-receiving circuit wherein light pulse signal is received, photoelectrically converted and shaped into an electric signal.

(2) Description of the Prior Art

A typical example of a prior art optical fiber system linking configuration is shown in FIG. 1 in which a 50M Baud TTL linking arrangement is schematically illustrated. In this system, a pair of apparatus each made up of a transmitting device T and a receiving device R are disposed in a distance 1 apart from one another and input and output of the data is effected through the linking arrangement.

Of these components, the receiving device the present invention. FIG. 2 shows a prior art example one of such receiving device which includes a single preamplifier A₃₁ and further includes a peak-holding circuit A₃₂ for holding a positive peak value V₃₁ of the output from the preamplifier A₃₁ and a bottom-holding circuit A₃₃ which is constructed with the polarities thereof inverted relative to those in the peak-holding circuit A₃₂, so that a peak-to-bottom value of the pulse (or pulse amplitude) can be obtained. The thus obtained peak-to-bottom value is used as a reference value and compared at a comparator A₃₄ to an output voltage from the preamplifier A₃₁.

Another prior art example is shown in FIG. 3. In this figure, designated at A₅₁ is a preamplifier, which is connected to a noninverting input terminal of a comparator A₅₃. Here, reference numeral A₅₂ designates an amplifier with a negative feed back connection made through a diode D₅₂. A cathode of the diode D₅₂ is grounded by way of a capacitor C. The diode D₅₂ is connected by way of a resistor R₅₂ to an inverting input terminal of a comparator A₅₃. In this arrangement, the comparator A₅₃ compares the output value from the preamplifier A₅₁ with a half of the peak value outputted from the same preamplifier A₅₁.

In the conventional example previously shown in FIG. 2, if an inphase noise Ns such as power supply noises arises, the peak value of the noise Ns may be held. This would cause the reference value for the comparator A₃₄ to be shifted as is shown in FIG. 4C, giving rise to a problem that comparator A₃₄ will not respond to a real input signal to which a response should be made.

Further, the peak hold circuit A₃₂ differs from the bottom hold circuit A₃₃ in that these circuits are not perfectly symmetrical. Therefore, the conventional system suffers from a problem that if the system is affected by power supply noise, the system cannot completely compensate for the influence of that noise.

Moreover, in the circuit of the prior art example shown in FIG. 3, half of the peak value of the output from the preamplifier A₅₁ is compared with the output of A₅₁. Therefore, if an input pulse light having a duty ratio of 50% has an increased frequency as shown in FIGS. 5A to 5C, the response of the output V₅₁ from the preamplifier A₅₁ does not follow the input pulse exactly, as shown in FIG. 5B.

In this case, the bottom value of the output from the preamplifier A₅₁ is not reduced to a non-signal level, and the potential level of the comparative reference voltage V₅₃ for the comparator A₅₃ does not agree with a potential level corresponding to a median amplitude of the output of A₅₁. Therefore, the waveform of the output V₅₄ from the comparator A₅₃ is distorted from a duty ratio of 50%.

On the other hand, Japanese Patent Application Laid-Open Sho 58 No.114637 discloses a publicly known prior art example of light pulse receivers. Peak and minimum values of a pulse signal are obtained by a peak value-holding circuit and a minimum value-holding circuit, respectively so as to yield an amplitude of the pulse signal from the difference. Then, a half of the pulse amplitude is used as a reference value for a comparator in order to compare the original pulse signal therewith. In this configuration, however, the peak value-holding circuit and the minimum value-holding circuit are different circuits. As a result, in the presence of noise such as power supply noise, these circuits hold a peak value and a minimum value of the noise. This method therefore suffers from a drawback that the reference value used in the comparator erroneously set by that noise.

SUMMARY OF THE INVENTION

In view of the above problems, it is an object of the present invention to provide a pulse light-receiving circuit in which the influence of power supply noise is eliminated and distortion of pulse signals having a duty ratio of 50% is prevented.

A first aspect of the present invention resides in that a pulse light-receiving circuit wherein pulse light is received, photoelectrically converted, amplified and shaped in its waveform so as to output a electric pulse signal, comprises: a difference amplifier having two output terminals, one for positive output (non-inverting output) and one for negative output (inverting output); a first peak value-holding circuit for holding a peak value of the positive output from the difference amplifier; a second peak value-holding circuit for holding a peak value of the negative output from the difference amplifier; means for calculating a median value of the amplitude of the positive output from the difference amplifier based on the output voltages obtained from the first peak value-holding circuit and the second peak value-holding circuit; and a comparator comparing the positive output from the difference amplifier with the calculated value.

By this arrangement, the noninverting output and the inverting output from the difference amplifier are held at their respective peak signal values so as to obtain a peak-to-peak value (pulse amplitude) of the pulse signal. The voltage having half of the pulse amplitude value is used as a reference voltage to be compared to the original signal. By this configuration, it is possible to realize a pulse light-receiving circuit which has a high processing speed and excellent resistance to power source noise.

A second aspect of the present invention lies in that a pulse light-receiving circuit comprises: a first light-receiving element photoelectrically converting pulse light from the outside to output a current; a first preamplifier amplifying the output current from the first light-receiving circuit; a second light-receiving element isolated from the outside light; a second preamplifier connected to the second light-receiving element and made up of a circuit equivalent to that of the first preamplifier; a difference amplifier amplifying the output difference between the first preamplifier and the second preamplifier; an auxiliary difference amplifier for outputting a reference voltage, made up of a circuit equivalent to that of the difference amplifier, with both input terminals thereof being commonly connected to an output terminal of the second preamplifier; a first peak value-detecting circuit portion for obtaining a first output peak value of the output from a first difference output terminal of the two output terminals of the difference amplifier, the first difference output terminal being connected to the first preamplifier; a second peak value-detecting circuit portion for obtaining a second output peak value of the output from a second difference output terminal of the two output terminals of the difference amplifier, the second difference output terminal being connected to the second preamplifier; a median value calculating means for calculating a median value of maximum and minimum values of the output from the first difference output terminal of the difference amplifier, on the basis of the reference voltage obtained from the auxiliary amplifier, the first output peak value obtained from the first peak value-detecting circuit portion and the second output peak value obtained from the second peak value-detecting circuit portion; and a comparator comparing the median value of maximum and minimum values of the output, calculated in the median value calculating means to the output from the first difference output terminal of the difference amplifier.

A third aspect of the present invention resides in that a pulse light-receiving circuit having the second feature described above includes the median value calculating means comprising: an inverting amplifier inverting the second output peak value obtained from the second peak value-detecting circuit portion relative to the reference voltage from the auxiliary amplifier; and an average value output portion outputting an average value of the inverted value obtained from the inverting amplifier and the first output peak value obtained from the first peak value-detecting circuit portion.

A fourth aspect of the present invention resides in that a pulse light-receiving circuit having the third feature described above includes the average value outputting portion comprising: a high-voltage side resistance connected to the first peak value-detecting circuit portion; and a low-voltage side resistance connected to the inverting amplifier and the resistances having the same characteristics.

In the configuration having the second to fourth features of the present invention, if a noise such as power source noise is mixed in the circuit, the noise appears equally in both preamplifiers connected to respective light-receiving elements. Since difference amplifiers exhibit no amplification to inphase signals, the inphase noise cancels. A peak value of the output from the first difference output terminal of the difference amplifier is held at the first peak value-detecting circuit portion to form the first peak value. Further the second peak value obtained at the second peak value-detecting circuit portion is inverted (so as to hold a bottom value) by the inverting amplifier relative to the reference voltage. These values, or the first peak value and the inverted value are averaged at the average value outputting portion to output an output median value, so that the output from the first difference output terminal of the difference amplifier is compared at the comparator to the output median value. By this method, the threshold level for the comparator as to be a reference for pulse height judgment of the pulse signal can be set at a median level of the amplitude of the output from the first difference output terminal. Accordingly, it is possible to reproduce pulse signals having a pulse duty ratio of 50% and prevent distortion of the pulse.

Next, a fifth aspect of the present invention resides in that a pulse light-receiving circuit having the second feature includes the median value calculating means comprising: a negative-feedback amplifier having a gain of 0.5, connected at a noninverting input terminal thereof with the first peak value-detecting circuit portion and connected at an inverting input terminal thereof with both the second peak value-detecting circuit portion and an output terminal thereof; and a reference voltage adding circuit portion adding the reference voltage obtained from the auxiliary amplifier to the output from the negative-feedback amplifier.

A sixth aspect of the present invention resides in that a pulse light-receiving circuit having the fifth feature described above includes the reference voltage adding circuit portion, being disposed between the noninverting input terminal of the negative-feedback amplifier and the auxiliary difference amplifier, and comprising an adding input portion adding the first output peak value obtained from the first difference output terminal and the reference voltage obtained from the auxiliary amplifier in a ratio of 1: 2 and inputting the sum to the noninverting input terminal of the negative-feedback amplifier.

A seventh aspect of the present invention resides in that a pulse light-receiving circuit having the sixth feature described above includes the reference voltage adding circuit portion comprising a buffer amplifier for removing the influences of the negative-feedback amplifier by way of the noninverting input terminal upon the auxiliary amplifier.

In the configuration having the fifth to seventh features of the present invention, a peak value of the output from the first difference output terminal of the difference amplifier is held at the first peak value-detecting circuit portion to form the first peak value while a peak value of the output from the second difference output terminal of the difference amplifier is held at the second peak value-detecting circuit portion to form the second peak value. The difference between the two output peak values is gain-reduced in half at the negative-feedback amplifier. The halved gain of the difference of the two output peak values is added at the reference voltage adding circuit portion with the reference voltage obtained from the auxiliary difference amplifier, so as to calculate an output mesial value of the output from the first difference output terminal of the difference amplifier. Then, the output from the first difference output terminal of the difference amplifier is compared at the comparator to the output median value to reproduce the pulse signal having a pulse duty ratio of 50%. At this time, at the adding input portion, the first output peak value and the reference voltage are added in a ratio of 2: 1, and the sum is inputted to the noninverting input terminal of the negative-feedback amplifier, to thereby maintain the ratio of the gain to the reference voltage at 0.5. Influence of the negative-feedback amplifier by way of the noninverting input terminal upon the auxiliary difference amplifier is removed by the buffer amplifier.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic illustrative view showing a prior art linking configuration of an optical fiber system;

FIG. 2 is a circuit diagram showing an example of a prior art pulse light-receiving circuit;

FIG. 3 is another circuit diagram showing an example of a prior art pulse light-receiving circuit;

FIG. 4A is a chart showing a waveform of pulse light inputted to the circuit shown in FIG. 2;

FIG. 4B is a chart showing a waveform of a power supply noise in the circuit shown in FIG. 2;

FIG. 4C is a chart showing a waveform in which voltages V₃₁ through V₃₄ at different points in the circuit shown in FIG. 2 are specified;

FIG. 4D is a chart showing a waveform of a final voltage V₃₅ in the circuit shown in FIG. 2;

FIG. 5A is a chart showing a waveform of pulse light inputted to the circuit shown in FIG. 3;

FIG. 5B is a chart showing a waveform in which voltages V₅₁ through V₅₃ in different points in the circuit shown in FIG. 3 are specified;

FIG. 5C is a chart showing a waveform of a final voltage V₅₄ in the circuit shown in FIG. 3;

FIG. 6 is a circuit diagram showing an embodiment of a pulse light-receiving circuit of the present invention;

FIG. 7 is a circuit diagram showing another embodiment of a pulse light-receiving circuit of the present invention;

FIG. 8A is a chart showing a waveform of pulse light inputted to the circuit shown in FIG. 7;

FIG. 8B is a chart showing a waveform of an output of a first preamplifier in the circuit shown in FIG. 7;

FIG. 8C is a chart showing a waveform of an output of a second preamplifier in the circuit shown in FIG. 7;

FIG. 8D is a chart showing waveforms in which voltages V₁₃ to V₁₉ in different points in the circuit shown in FIG. 7 are specified;

FIG. 8E is a chart showing a waveform of a final voltage V₂₀ in the circuit shown in FIG. 7;

FIG. 9 is a circuit diagram showing still another embodiment of a pulse light-receiving circuit of the present invention; and

FIG. 10 is a chart showing waveforms in which voltages in different points in the circuit shown in FIG. 9 are specified.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG.6, one embodiment of a pulse light-receiving circuit of the present invention will be described. In FIG. 6, PD₁₁ designates a light-receiving element (a photo-diode) for photoelectrically converting light pulses externally received.

Designated at A₁₁ is a first preamplifier for amplifying a current output from the light-receiving element PD₁₁. The first preamplifier A₁₁ is connected at its input terminal with the light-receiving element PD₁₁. The input terminal of the first preamplifier A₁₁ is connected to an output terminal thereof by way of a feedback resistor R₁₁.

Designated at A₁₂ is a second preamplifier. An input terminal of the second preamplifier A₁₂ is connected to an output terminal thereof by way of a feedback resistor R₁₂. This resistor R₁₂ has the same resistance as the resistor R₁₁ in the first preamplifier A₁₁.

Designated at A₁₃ is a typical difference amplifier for amplifying a difference between outputs of A₁₁ and A₁₂, including a pair of transistors of which collectors are both connected to a power supply Vcc by way of resistors R₁₃ and R₁₄, respectively. Here, the resistors R₁₃ and R₁₄ have the same resistance.

A first transistor of the pair transistors in the difference amplifier A₁₃ is connected at its base terminal to the output terminal of the first preamplifier A₁₁. A second transistor of the pair transistors is connected at its base terminal to the output terminal of the second preamplifier A₁₂. Emitters of the pair transistors are both connected to a constant current source I₁₁. A resistor R₁₁₆ is connected at an intermediate point of the connection between the collector of the first transistor and the resistor R₁₃ whereas another resistor R₁₁₅ is connected with an intermediate point of the connection between the collector of the second transistor and the resistor R₁₄.

A junction between these resistors R₁₁₅ and R₁₁₆ is connected to a noninverting input terminal of an amplifier B₁₁₁. An output terminal of the amplifier B₁₁₁ is connected to the inverting input terminal of the amplifier B₁₁₁ to form a negative-feedback connection.

Designated at A₁₅ is a first peak value-detecting circuit portion (peak-holding circuit) which holds a peak of the output from one of the two output terminals in the difference amplifier A₁₃ or the one which is connected to the first preamplifier A₁₁, so as to yield a first output peak value (peak-hold value) V₁₁₉. On the other hand, designated at A₁₆ is a second peak value-detecting circuit portion (peak-holding circuit) which holds a peak of the output from the other output terminal in the difference amplifier A₁₃ so as to yield a second output peak value (peak-hold value) V₁₂₀.

The first peak value-detecting circuit portion A₁₅ is composed of a couple of operational amplifier elements A₁₁₅ and B₁₁₂ forming a positive follower, and a positive-peak value-holding circuit made up of a diode D₁₁ and a capacitor C₁₁ is provided as a closed loop. A noninverting input terminal of the operational amplifier element A₁₁₅ on the input side of the first peak value-detecting circuit portion A₁₅ is connected to a middle point (where the voltage is designated by V₁₃) between the collector of the first pair transistor and the resistor R₁₃ of the difference amplifier A₁₃. An inverting input terminal of the A₁₁₅ is connected to a junction between the diode D₁₁ and the capacitor C₁₁ so as to form a negative-feedback connection. A noninverting input terminal of the operational amplifier element B₁₁₂ on output side of the first peak value-detecting circuit portion A₁₅ is connected to a middle point between the diode D₁₁ and the capacitor C₁₁. An inverting input terminal of B₁₁₂ is connected to an output terminal thereof to form a negative feedback loop.

The second peak value-detecting circuit portion A₁₆, like the first peak value-detecting circuit portion A₁₅, forms a positive follower with a couple of operational amplifier elements A₁₁₆ and B₁₁₃, and a positive-peak value-holding circuit is provided in the closed loop. Specifically, a noninverting input terminal of the operational amplifier element A₁₁₆ on the input side of the second peak value-detecting circuit portion A₁₆ is connected to a middle point (the voltage is V₁₄) between the collector of the second pair transistor and the resistor R₁₄ in the difference amplifier A₁₃. An inverting input terminal of the A₁₁₆ is connected to a junction between a diode D₁₂ and a capacitor C₁₂, which are equivalent to the diode D₁₁ and the capacitor C₁₁, respectively, so as to form a negative feedback connection. A noninverting input terminal of the operational amplifier element B₁₁₃ on the output side of the second peak value-detecting circuit portion A₁₆ is connected to the middle point between the diode D₁₂ and the capacitor C₁₂. An inverting input terminal of B₁₁₃ is connected to an output terminal thereof to form a negative feedback loop.

Designated at A₁₁₇ is an inverting amplifier which inverts the first output peak value V₁₁₉ obtained by the first peak value-detecting circuit portion A₁₅ relative to a second output peak value V₁₂₀ obtained in the second peak value-detecting circuit portion A₁₆. An inverting input terminal of A₁₁₇ is connected via a resistor R₁₁₈ to the output terminal of the second peak value-detecting circuit portion A₁₆. The inverting input terminal of the inverting amplifier A₁₁₇ is further connected via a resistor R₁₂₀ with an output terminal thereof to form a negative feedback connection. On the other hand, a noninverting input terminal of A₁₁₇ is connected via a resistor R₁₁₇ to the output terminal of the first peak value-detecting circuit portion A₁₅. The noninverting input terminal is further connected via a resistor R₁₁₉ with an output terminal of an amplifier B₁₁₁. In this case, resistors R₁₁₇, R₁₁₈, R₁₁₉ and R₁₂₀ have the following relations:

    R.sub.117 =R.sub.118 =2×R.sub.119 =2×R.sub.120.

Designated at A₁₈ is a comparator. The comparator A₁₈ is supplied at its noninverting input terminal with the output V₁₃ as one of the outputs from the difference amplifier A₁₃. An inverting input terminal of A₁₈ is supplied with an output V₂₁ from the inverting amplifier A₁₁₇. The comparator A₁₈ compares the output provided from the output terminal that is connected to the first preamplifier A₁₁ of the difference amplifier A₁₃, with a comparative reference value, namely, a difference between the output of the first peak value-detecting circuit portion A₁₅ and the output of the second peak value-detecting circuit portion A₁₆.

In the above arrangement, when the first light-receiving element PD₁₁ detects a pulse light the light pulse is photoelectrically converted to yield an output current, which in turn is amplified at the first preamplifier A₁₁. The output V₁₁ from the first preamplifier A₁₁ is supplied to the base terminal of the first transistor in the difference amplifier A₁₃. On the other hand, output V₁₂ will not be generated by the second preamplifier A₁₂ except is present. Once, however, occurs a noise, the output V₁₂ carrying the noise is provided to the base terminal of the second transistor of the difference amplifier A₁₃.

Here, if V₁₁ is greater than V₁₂, a current flowing through the resistor R₁₃ is greater than a current that flows through the resistor R₁₄. When V₁₁ is equal to V₁₂, the current flowing through the resistor R₁₃ is equal to the current that flows through the resistor R₁₄ (V₁₃ =V₁₄). In this case, if there is generated a noise in the circuit, both the preamplifiers A₁₁ and A₁₂ are of the same structure, so that the noise gives equivalent effects on the both elements.

Next, the output V₁₃ is supplied to the noninverting input terminal of the comparator A₁₈. The output V₁₃ is simultaneously supplied to the noninverting input terminal of the operational amplifier element A₁₁₅ on the input side of the first peak value-detecting circuit portion A₁₅. Here, when the voltage V₁₃ is great, the voltage V₁₃ is amplified by the operational amplifier element A₁₁₅ disposed on the input side in the first peak value-detecting circuit portion A₁₅. The amplified voltage charges the capacitor C₁₁ via the diode D₁₁, and the charged potential gives a noninverting input voltage to the operational amplifier B₁₁₂ disposed on the output side. In this case, the peak value is maintained in the capacitor C₁₁ for a long period of time.

On the other hand, when the voltage V₁₃ becomes low, the output from the operational amplifier element A₁₁₅ on the input side drops down almost to the negative power source voltage to cut off the diode D₁₁. Nevertheless, the noninverting input terminal of the operational amplifier B₁₁₂ on the output side is supplied with the peak voltage kept in a prolonged time by the capacitor C₁₁. As a result, a peak value of the output from the first peak value-detecting circuit portion A₁₅ may be held. On the other hand, the output V₁₄ is inputted to the noninverting input terminal of operational amplifier element A₁₁₆ on the input side of the second peak value-detecting circuit portion A₁₆. At the instance, a peak value of the output from the second peak value-detecting circuit portion A₁₆ is held in the same manner as in the first peak value-detecting circuit portion A₁₅. The peak value is then inverted by the inverting amplifier A₁₁₇ in this case.

Thus, the comparative reference voltage V₂₁ provided for the comparator A₁₈ is set at a voltage level which corresponds to the median point of the pulse amplitude of the output of the difference amplifier A₁₃. This allows the comparator A₁₈ to reproduce a pulse output having a pulse duty ratio of approximately 50% with reduced distortion of waveform.

Referring next to FIG. 7, another embodiment of the present invention will be described. In FIG. 7, PD₁₁ designates a first light-receiving element (a photo-diode) for photoelectrically converting received light pulses.

Designated at A₁₁ is a first preamplifier for amplifying a current output from the first light-receiving element PD₁₁. A noninverting input terminal of the first preamplifier A₁₁ is connected to a reference voltage source Vref. The first preamplifier A₁₁ is connected at its inverting input terminal with the first light-receiving element PD₁₁. In addition, the inverting input terminal of the first preamplifier A₁₁ is connected to an output terminal thereof by way of a resistor R₁₁ to form a negative feedback connection.

PD₁₂ designates a second light-receiving element (a photo-diode) which is isolated from any light source so as to serve as a dummy element. Designated at A₁₂ is a second preamplifier which is connected to the second light-receiving element PD₁₂. The second preamplifier A₁₂ is provided so as to conform the output environment of the second light-receiving element PD₁₂ to the conditions imposed on the first light-receiving element PD₁₁. Accordingly, the second preamplifier A₁₂ is connected at its noninverting input terminal with the reference voltage source Vref like the first preamplifier A₁₁. An inverting input terminal of A₁₂ is connected to the second light-receiving element PD₁₂. The inverting input terminal of A₁₂ is also connected to an output terminal thereof by way of a resistor R₁₂ to form a negative feedback connection. This resistor R₁₂ has the same resistance as the resistor R₁₁ in the first preamplifier A₁₁.

Designated at A₁₃ is a typical difference amplifier for amplifying a difference between outputs of A₁₁ and A₁₂, including a pair of transistors of which collectors are both connected to a power supply Vcc by way of resistors R₁₃ and R₁₄, respectively. Here, the resistors R₁₃ and R₁₄ have the same resistance.

A first transistor of the pair transistors in the difference amplifier A₁₃ is connected at its base terminal to the output terminal of the first preamplifier A₁₁. A second transistor of the pair transistors is connected at its base terminal to the output terminal of the second preamplifier A₁₂. Emitters of the pair transistors are both connected to a constant current source I₁₁. A middle point of a connection between the collector of the first pair transistor and the resistor R₁₃ is connected to the base terminal of a transistor Q₁₃. A middle point of a connection between the collector of the second pair transistor and the resistor R₁₄ is connected to the base terminal of a transistor Q₁₄. Collectors of the transistors Q₁₃ and Q₁₄ are both connected to a power supply Vcc. Emitters of the transistors Q₁₃ and Q₁₄ are connected to constant current sources I₁₂ and I₁₃, respectively.

In addition, in the present embodiment, another auxiliary difference amplifier A₁₄ is provided separately from the difference amplifier A₁₃. The auxiliary difference amplifier A₁₄ outputs a reference voltage V₁₇ which is equivalent to the output of the difference amplifier A₁₃ when the amplifier A₁₃ is provided with no light signal. The auxiliary difference amplifier A₁₄ includes resistors R₁₅ and R₁₆, as shown in FIG. 7, which are equivalent to the resistors R₁₃ and R₁₄, so as to compose an identical circuit having characteristics totally equivalent to those of the difference amplifier A₁₃. Input terminals of the auxiliary difference amplifier A₁₄ are both connected to the output terminal of the second preamplifier A₁₂.

Designated at A₁₅ is a first peak value-detecting circuit portion (peak-holding circuit) which holds a peak of the output from a terminal of the two output terminals in the difference amplifier A₁₃ or a first difference output terminal T1 which is connected to the first preamplifier A₁₁, so as to yield a first output peak value (peak-hold value) V₁₅. On the other hand, designated at A₁₆ is a second peak value-detecting circuit portion (peak-holding circuit) which holds a peak of the output from the other terminal or a second difference output terminal T₂ in the difference amplifier A₁₃ so as to yield a second output peak value (peak-hold value) V₁₆.

The first peak value-detecting circuit portion A₁₅ is composed of a couple of operational amplifier elements forming a positive follower, and a positive-peak value-holding circuit made up of a diode D₁₁ and a capacitor C₁₁ is provided in the closed loop. A noninverting input terminal of one of the operational amplifier elements which is on the input side of the first peak value-detecting circuit portion A₁₅ is connected to an emitter (the voltage is V₁₃) of the transistor Q₁₃ in the difference amplifier A₁₃. An inverting input terminal of the same operational amplifier element is connected to a junction between the diode D₁₁ and the capacitor C₁₁ so as to form a negative feedback connection. On the other hand, a noninverting input terminal of the other operational amplifier element which is on the output side of the first peak value-detecting circuit portion A₁₅ is connected to a middle point between the diode D₁₁ and the capacitor C₁₁. An inverting input terminal of the same operational amplifier element is connected to an output terminal thereof to form a negative feedback loop.

The second peak value-detecting circuit portion A₁₆, like the first peak value-detecting circuit portion A₁₅, is composed of a couple of operational amplifier elements forming a positive follower, and a positive peak value holding circuit is provided in the closed loop. Specifically, a noninverting input terminal of one of the operational amplifier elements which is on the input side is connected to an emitter (the voltage is V₁₄) of the transistor Q₁₄ in the difference amplifier A₁₃. An inverting input terminal of the same operational amplifier element is connected to a junction between the diode D₁₂ and the capacitor C₁₂ that are equivalent to the diode D₁₁ and the capacitor C₁₁, respectively, so as to form a negative feedback connection. On the other hand, a noninverting input terminal of the other operational amplifier element which is on the output side of the second peak value-detecting circuit portion A₁₆ is connected to a middle point between the diode D₁₂ and the capacitor C₁₂. An inverting input terminal of the same operational amplifier element is connected to an output terminal thereof to form a negative feedback loop.

Designated at A₁₇ is an inverting amplifier which inverts the second output peak value V₁₆ obtained by the second peak value-detecting circuit portion A₁₆ relative to the reference voltage V₁₇ outputted from the auxiliary difference amplifier A₁₄. An inverting input terminal of A₁₇ is connected via a resistor R₁₇ to the output terminal of the second peak value-detecting circuit portion A₁₆. On the other hand, a noninverting input terminal of A₁₇ is supplied with the output voltage V₁₇ from the auxiliary difference amplifier A₁₄. This output voltage V₁₇ serves as the inversion reference voltage for the inverting amplifier A₁₇. Here, the inverting input terminal of A₁₇ is further connected by way of a resistor R₁₈ to an output terminal of the inverting amplifier A₁₇ to form a negative feedback connection.

R₁₉ and R₂₀ designate resistors that serve as an average outputting portion for providing an average value of an inverted value (bottom hold value) V₁₈ obtained in the inverting amplifier A₇ and the first output peak value V₁₅ obtained in the first peak value-detecting circuit portion A₁₅. These resistors are disposed in series between the output terminal (potential V₁₅) of the first peak value-detecting circuit portion A₁₅ and the output terminal (potential V₁₈) of the inverting amplifier A₁₇. Here, the two resistors R₁₉ and R₂₀ have the same characteristics, and the average value V₁₉ obtained by the resistors R₁₉ and R₂₀ is given by V₁₉ =(V₁₅ -V₁₈)/2+V₁₈. Thus, the resistors R₁₉ and R₂₀ and the inverting amplifier A₁₇ constitute a median value calculating means which provides a median of the amplitude of the output V₁₃ (a voltage level that corresponds to the medial point of variation of the output) from the first difference output terminal T1 in the difference amplifier A₁₃, on the basis of the reference voltage V₁₇ obtained in the auxiliary difference amplifier A₁₄, the first output peak value V₁₅ obtained in the first peak value-detecting circuit portion A₁₅ and the second output peak value V₁₆ obtained in the second peak value-detecting circuit portion A₁₆.

Designated at A₁₈ is a comparator. The comparator A₁₈ is supplied at its noninverting input terminal with the first output V₁₃ as one of the outputs of the difference amplifier A₁₃. More specifically, the emitter voltage V₁₃ of the transistor Q₁₃ on the first preamplifier A₁₁ side. An inverting input terminal of A₁₈ is supplied with the output average value V₁₉ of the output V₁₅ of the first peak value-detecting circuit portion A₁₅ and the output V₁₈ of the inverting amplifier A₁₇. The comparator A₁₈ compares the output provided from the output terminal that is connected to the first preamplifier A₁₁ of the difference amplifier A₁₃, with a comparative reference value, namely, the average of the output of the first peak value-detecting circuit portion A₁₅ and the output of the second peak value-detecting circuit portion A₁₆.

In the above arrangement, when the first light-receiving element PD₁₁ detects pulse light, the light pulse is photoelectrically converted to yield an output current, which in turn is amplified at the first preamplifier A₁₁. The output V₁₁ from the first preamplifier A₁₁ is supplied to the base terminal of the first transistor in the difference amplifier A₁₃. On the other hand, the second light-receiving element PD₁₂ is isolated from light, so that the second preamplifier A₁₂ will not generate any output except noise. The detected noise is provided to the base terminal of the second transistor of the difference amplifier A₁₃.

In this instance, if V₁₁ is greater than V₁₂, a current flowing through the resistor R₁₃ is greater than a current that flows through the resistor R₁₄. Accordingly, the base voltage of the transistor Q₁₃ drops as compared with the base voltage of the transistor Q₁₄. When V₁₁ is equal to V₁₂, the current flowing through the resistor R₁₃ is equal to the current that flows through the resistor R₁₄ (V₁₃ =V₁₄). In this case, if there is generated a noise in the circuit, the noise gives equivalent effects on both elements because both the preamplifiers A₁₁ and A₁₂ are of the same structure.

Next, the output V₁₃ of the transistor Q₁₃ is supplied to the noninverting input terminal of the comparator A₁₈. The output V₁₃ of the transistor Q₁₃ is simultaneously supplied to the noninverting input terminal of the operational amplifier element on the input side of the first peak value-detecting circuit portion A₁₅. Here, when the voltage V₁₃ is great, the voltage V₁₃ is amplified by the operational amplifier element on the input side in the first peak value-detecting circuit portion A₁₅. The amplified voltage charges the capacitor C₁₁ via the diode D₁₁, and the charged voltage gives a noninverting input voltage to the operational amplifier on the output side. In this case, the peak value is maintained in the capacitor C₁₁ for a long period of time.

On the other hand, when the voltage V₁₃ becomes low, the output of the operational amplifier element on the input side falls down near to the negative power source voltage to cut off the diode D₁₁. Nevertheless, the noninverting input terminal of the operational amplifier on the output side is supplied with the peak voltage kept in a prolonged time by the capacitor C₁₁. As a result, a peak value of the output from the first peak value-detecting circuit portion A₁₅ is held. On the other hand, the output V₁₄ from the transistor Q₁₄ is inputted to the noninverting input terminal of the operational amplifier element on the input side of the second peak value-detecting circuit portion A₁₆. At the instance, a peak value of the output from the second peak value-detecting circuit portion A₁₆ is held in the same manner as in the first peak value-detecting circuit portion A₁₅. The peak value is then inverted by the inverting amplifier A₁₇.

In this case, the output voltage V₁₇ from the auxiliary difference amplifier A₁₄ is used as an inversion-referential voltage for the inverting amplifier A₁₇. Since the auxiliary difference amplifier A₁₄ is constructed identically with the difference amplifier A₁₃, if there occurs a noise, the noise causes an equivalent influence on the two amplifiers. Outputs from the first peak value-detecting circuit portion A₁₅ and the inverting amplifier A₁₇ are supplied in parallel through respective resistors R₁₉ and R₂₀ to the inverting input terminal of the comparator A₁₈. Here, R₁₉ =R₂₀, so that the following relation holds: V₁₉ =(V₁₅ -V₁₈)/2+V₁₈. Then, the comparator A₁₈ compares the voltage V₁₃ with the reference voltage V₁₉ to judge whether V₁₃ is greater or smaller than the reference voltage.

FIGS. 8A to 8E show waveforms in different points in the above circuit. FIG. 8A indicates a light input waveform. FIG. 8B shows a waveform of the output V₁₁ from the first preamplifier A₁₁. FIG. 8C shows a waveform of the output V₁₂ from the first preamplifier A₁₂. FIG. 8D shows waveforms in which voltages V₁₃ to V₁₉ in different points and GND level are specified. FIG. 8E shows a waveform of a final output V₂₀. As shown in FIGS. 8A to 8E, the comparative reference voltage V₁₉ provided for the comparator A₁₈ is set at a voltage level which corresponds to the median point of the pulse amplitude of the output of the difference amplifier A₁₃. This allows the comparator A₁₈, when a pulse signal having a pulse duty ratio of 50% is inputted, to reproduce a pulse output having a pulse duty ratio of approximately 50%. Therefore, it is possible to reduce distortion of waveform.

Next, still another embodiment of the present invention will be shown in FIG. 9.

In the previous embodiment shown in FIG. 7, the output terminal of the first peak value-detecting circuit portion A₁₅ is directly to the resistor R₁₉ while the output terminal of the second peak value-detecting circuit portion A₁₆ is connected to the resistor R₂₀ by way of the inverting amplifier A₁₇. Therefore, although the two peak value-detecting circuit portions A₁₅ and A₁₆ have a perfect symmetry, the median value calculating means disposed on their output sides cannot afford a perfect symmetry. For this reason, if an inphase noise occurs, V₁₅ and V₁₈ could not form signals perfectly opposite to one another, and therefore, it is difficult to offset the noise appearing on the positive side against that appearing on the negative side. The embodiment of the present invention described hereinafter is to substantially perfectly balance the noise appearing on the positive side against that appearing on the negative side. This embodiment includes, as shown in FIG. 9, a first light-receiving element PD₁₁ and a first preamplifier A₁₁ for amplifying a photoelectric current outputted from the first light-receiving element PD₁₁. The circuit further includes a second light-receiving element (dummy element) PD₁₂ which has the same structure as of the first light-receiving element PD₁₁ or a different structure but a PN-junction producing the same capacity and which is isolated from light from the outside. There is provided also a second preamplifier A₁₂ which is identical with the first preamplifier A₁₁, a difference amplifier A₁₃ for amplifying a difference between an output from the first preamplifier A₁₁ and an output from the second preamplifier A₁₂. Here, the difference amplifier A₁₃ has no negative feedback connection. A₁₄ designates an auxiliary amplifier which is formed identically with the difference amplifier A₁₃, and is connected to a constant current source I₁₄ which is identical with a constant current source I₁₁ for the difference amplifier A₁₃. Resistors R₁₅ and R₁₆ which are connected to respective collectors of pair transistors are identical with each other, and equivalent to a pair of resistors R₁₃ and R₁₄ in the difference amplifier A₁₃. Both base (input) terminals of the pair transistors in the auxiliary difference amplifier A₁₄ are connected in common with the output terminal of the second preamplifier A₁₂. A collector (output) terminal of one of the transistors in the auxiliary difference amplifier A₁₄ outputs a voltage V₂₁ that is the same with the output from the difference amplifier A₁₃ when no light signal is inputted to the first light-receiving element PD₁₁. Designated at B₁₁ is a buffer amplifier (voltage follower circuit) with a negative feedback loop. The buffer amplifier B₁₁ is used as a buffering circuit for the output voltage V₂₁ from the auxiliary difference amplifier A₁₄. Here, if the offset voltage of the voltage follower circuit B₁₁ is equal to zero, V₂₁ is equal to V₁₇. A noninverting input terminal of the voltage follower circuit B₁₁ is connected to the collector terminal of one of transistors in the auxiliary difference amplifier A₁₄. There are also provided a first peak value-detecting circuit A₁₅ and a second peak value-detecting circuit A₁₆. The internal structures of these circuits are identical with those used in the second embodiment, therefore, the description on these circuits will be omitted.

Designated at A₂₁ is a negative-feedback amplifier for obtaining a difference between an output V₁₅ from the first peak value-detecting circuit portion A₁₅ and an output V₁₆ from the second peak value-detecting circuit portion A₁₆. The noninverting input terminal of A₂₁ is connected to the first peak value-detecting circuit portion A₁₅ and the inverting input terminal of the same is connected to the second peak value-detecting circuit portion A₁₆. Here the negative-feedback amplifier A₂₁ is provided with an input resistor R₂₂ and a negative feedback resistor R₂₄ which serve to set up the gain to be 0.5. The relation between the two resistors R₂₂ and R₂₄ is as follows:

    R.sub.22 =2×R.sub.24.

By this relation, the output gain of the negative-feedback amplifier A₂₁ relative to input is set up as to be 0.5.

There is also provided a reference voltage adding circuit portion A₂₂ for adding the reference voltage V₁₇ obtained from the auxiliary difference amplifier A₁₄ to the output from the negative-feedback amplifier A₂₁. The reference voltage adding circuit portion A₂₂ includes a lead wire from a noninverting input terminal of the negative-feedback amplifier A₂₁ to the auxiliary difference amplifier A₁₄ and an adding input portion A₂₃ for adding the first output peak value V₁₅ from the first difference output terminal T1 and the reference voltage V₁₇ obtained from the auxiliary difference amplifier A₁₄ in a ratio of 1 : 2 and supplying the sum to the noninverting input terminal of the negative-feedback amplifier A₂₁. The reference voltage adding circuit portion A₂₂ further includes a buffer amplifier B₁₁ for removing the influence of the negative-feedback amplifier A₂₁ by way of the noninverting input terminal of A₂₁ upon the auxiliary difference amplifier A₁₄. The adding input portion A₂₃ is composed as seen in FIG. 9 of a resistor R₂₁ between the first peak head value-detecting circuit portion A₁₅ and the noninverting input terminal of the negative-feedback amplifier A₂₁ and a resistor R₂₃ disposed between the lead wire as a part of the reference voltage adding circuit portion A₂₂ and the noninverting input terminal of the negative-feedback amplifier A₂₁. Here, these resistors suffice the following relations:

    R.sub.21 =2×R.sub.23

    R.sub.21 =R.sub.22

    R.sub.23 =R.sub.24.

Here, among the output V₁₉ from the negative-feedback amplifier A₂₁, the two output peak values V₁₅ and V₁₆ and the reference voltage V₁₇, a relation generally holds as follows:

    V.sub.19 =(R.sub.24 /R.sub.22)×(V.sub.15 -V.sub.16)+V.sub.17.

On the other hand, since R₂₁ =R₂₂ =2×R₂₃ =2×R₂₄, the gain of the difference amplifier A₂₁ is 0.5, and consequently V₁₉ can be represented as follows:

    V.sub.19 =(V.sub.15 V.sub.16)/2+V.sub.17                   (1).

Here, a median value V₁₉ calculating means which is constructed by the negative-feedback amplifier A₂₁ and the reference voltage adding circuit portion A₂₂, determines a median value of the output variation of the output V₁₃ from the first difference output terminal T1 of the difference amplifier A₁₃, based on the reference voltage V₁₇ obtained in the auxiliary difference amplifier A₁₄, the first output peak value V₁₅ obtained in the first peak value-detecting circuit portion A₁₅ and the second output peak value V₁₆ obtained in the second peak value-detecting circuit portion A₁₆.

FIG. 10 shows waveforms in different points in the pulse light-receiving circuit thus constructed, when the circuit receives a high frequency pulse light having a duty ratio of 50%. As the frequency of the input pulse light becomes higher, the output response of the difference amplifier A₁₃ cannot exactly follow the input pulses. At this time, the bottom value of the output from the difference amplifier A₁₃ does not return to the level V₁₇ that represents the non-signal state. To deal with this phenomenon, or in order to reduce distortion of output pulses from the comparator A₁₈ and make the duty ratio of the output pulse signal close to 50%, it is necessary to compare the output V₁₃ from the first difference output terminal of the difference amplifier A₁₃ with a median value (a voltage level corresponding to a median amplitude) V₁₉ of the variation of the output of the difference amplifier A₁₃. Referring now to FIG. 10, consider Va in the following relation with regard to the output V₁₃ supplied from one terminal of the difference amplifier A₁₃ :

    V.sub.13 =V.sub.17 +Va+Vx,

and Vb in the following relation with regard to the first output peak value V₁₅ :

    V.sub.15 =V.sub.17 +Va+Vb.

Here, Vx indicates a periodically varying component. As seen in FIG. 10, the second output peak value V₁₆ is:

    V.sub.16 =V.sub.17 -Va,

so that

    V.sub.15 -V.sub.16 =2Va+Vb

    ∴(V.sub.15 -V.sub.16)/2=Va+Vb/2                    (2).

Here, V₁₉ to be sought can be represented as seen in FIG. 10,

    V.sub.19 =Va+Vb/2+V.sub.17                                 (3)

From (2) and (3),

    V.sub.19 =(V.sub.15 -V.sub.16)/2+V.sub.17.

This corresponds to the above expression (1). The configuration of this embodiment, without use of an inverting amplifier as used in the second embodiment, compares one of outputs from the difference amplifier A₁₃ with reference to the median value V₁₉ of the variation of the output of the difference amplifier A₁₃ in order to judge whether the output is greater or smaller than the reference voltage. Accordingly, the median value calculating means in the second embodiment does not have a perfect symmetry since no inverting amplifier A₁₇ is equipped to the comparator A₁₈ on its noninverting input terminal side. In contrast to this, in the present embodiment, the entire circuit including the first peak value-detecting circuit portion A₁₅, the second peak value-detecting circuit portion A₁₆ and the median value calculating means has a perfect symmetry, so that it is possible to eliminate inphase noises by offsetting the noises on the positive side with the negative side.

It should be noted that the present invention is not limited to the above embodiments described herein, many variations and modifications can of course be made in the above embodiments within a scope of the present invention.

For example, detailed circuit constructions such as of providing voltage-adjustment resistors for various parts of the circuit are not limited to those shown in FIGS. 6, 7 and 9.

As is apparent from the foregoing description, in accordance with the first aspect of the present invention, it is possible for the configuration having the first feature to realize a pulse light-receiving circuit which has a high processing speed and is excellent in resistance to power source noise, by holding at their peaks the noninverting output and inverting output created from an original signal by the difference amplifier so as to obtain a peak-to-minimum value (amplitude value) and comparing the original signal to the half of the obtained amplitude value.

In accordance with the second through fourth aspects of the present invention, an additional light-receiving element isolated from the outside light is provided separately of the first light-receiving element for photoelectric conversion. Output currents from the two light-receiving elements are amplified respectively in different preamplifiers made up of the same circuit components, and the amplified currents are detected respectively in different peak value detecting circuit portions of the same circuit components to form respective peak values. An output median value of the output from one of the terminals of the difference amplifier is calculated based on the two peak values. The comparator compares the output signal height from one output terminal of the difference amplifier with reference to the output median value. Accordingly, inphase noise such as power source noise and the like can be cancelled improving resistance to noise. In addition, even if a pulse signal having a higher frequency is inputted to the pulse light-receiving circuit, the circuit may inhibit the distortion of the output waveform. Especially, in accordance with the embodiments of the third and fourth features of the present invention, it is possible to realize improvement in noise resistance and reduction in distortion of output waveform using a simple configuration.

In accordance with the fifth feature of the present invention, the first peak value-detecting circuit portion is connected to the noninverting input terminal of the negative-feedback amplifier and the second peak value-detecting circuit portion is connected to the inverting input terminal of the same amplifier. Accordingly, the first peak value-detecting circuit portion and the second peak value-detecting circuit portion can be connected keeping perfect symmetry. Therefore, inphase noise may substantially offset each other, or noise signals on the positive and negative sides can offset each other. As a result, it is possible to improve the noise resistance.

Further, in accordance with the sixth feature of the present invention, since the reference voltage adding circuit portion include an adding input portion, by a simple configuration it is possible to add the first output peak value obtained from the first difference output terminal and the reference voltage obtained from the auxiliary difference amplifier in a ratio of 1:2.

In accordance with the seventh feature of the present invention, since the pulse light-receiving circuit is made to include a buffer amplifier, it is possible to remove the influence of the negative-feedback amplifier by way of the noninverting input terminal on the auxiliary amplifier. Accordingly, the reference voltage for calculating an output median value can be detected with precision, whereby the height-determination of the pulse signals is carried out with precision. 

What is claimed is:
 1. A pulse light-receiving circuit comprising: a first light-receiving element photoelectrically converting a pulse light into an electrical current;a first preamplifier amplifying the electrical current from said first light-receiving element; a second light-receiving element shielded from light; a second preamplifier, connected to said second light-receiving element and made up of a circuit equivalent to that of said first preamplifier for amplifying an output from said second light-receiving element; a primary difference amplifier amplifying a light-receiving element difference between output signals from said first preamplifier and said second preamplifier; an auxiliary difference amplifier for outputting a reference voltage, made up of a circuit equivalent to that of said primary difference amplifier, with both input terminals thereof being commonly connected to an output terminal of said second preamplifier; a first peak value-detecting circuit for obtaining a first peak value of an output from a first difference output terminal of said primary difference amplifier, said first difference output terminal being connected to said first peak value-detecting circuit; a second peak value-detecting circuit for obtaining a second peak value of an output from a second difference output terminal of said primary difference amplifier, said second difference output terminal being connected to said second peak value-detecting circuit; a median value calculator for calculating a median value between maximum and minimum values of the output from said first difference output terminal based on the reference voltage, the first peak value, and the second peak value; and a comparator comparing the median value to the output from said first difference output terminal.
 2. A pulse light-receiving circuit according to claim 1, wherein said median value calculator comprises:an inverting amplifier inverting the second peak value relative to the reference voltage from said auxiliary amplifier; and an average value output circuit outputting an average value of the inverted value and the first peak value.
 3. A pulse light-receiving circuit according to claim 2, wherein said average value outputting circuit comprises:a high-voltage side resistance connected to said first peak value-detecting circuit; and a low-voltage side resistance connected to said inverting amplifier, said high voltage and low-voltage side resistances having the same characteristics.
 4. A pulse light-receiving circuit according to claim 1, wherein said median value calculator comprises: a negative-feedback amplifier having a gain of 0.5, connected at a noninverting input terminal thereof with said first peak value-detecting circuit and connected at an inverting input terminal thereof with both said second peak value-detecting circuit and an output terminal thereof; anda reference voltage adding circuit adding the reference voltage obtained from said auxiliary amplifier to the output from said negative-feedback amplifier.
 5. A pulse light-receiving circuit according to claim 4, wherein said reference voltage adding circuit is disposed between said noninverting input terminal of said negative-feedback amplifier and said auxiliary difference amplifier, and comprises an adding input for summing the first peak value and the reference voltage in a ratio of 1:2 and inputting the sum to said noninverting input terminal of said negative-feedback amplifier.
 6. A pulse light-receiving circuit according to claim 5, wherein said reference voltage adding circuit comprises a buffer amplifier for removing an influence of said negative-feedback amplifier by way of said noninverting input terminal on said auxiliary amplifier. 